Towards an FPGA based reconfigurable computing environment for neural network implementations

J. Zhu, G. J. Milne, B. K. Gunther

Research output: Chapter in Book/Conference paperConference paper

27 Citations (Scopus)

Abstract

A different class of hardware environment, an FPGA-based reconfigurable computing environment for implementing neural networks, is developed. FPGAs offer speed comparable to dedicated and fixed hardware systems for parallel algorithm acceleration while, as with a software implementation, retaining a high degree of flexibility for device reconfiguration as the application demands. Such an FPGA based hardware environment is not only capable of implementing different size and forms of neural networks on the same hardware device, but it also capable of supporting the dynamic creation and modification of neural network topologies.

Original languageEnglish
Title of host publicationIEE Conference Publication
Pages661-666
Number of pages6
Volume2
Edition470
Publication statusPublished - 1 Dec 1999
Externally publishedYes
EventProceedings of the 1999 the 9th International Conference on 'Artificial Neural Networks (ICANN99)' - Edinburgh, UK
Duration: 7 Sep 199910 Sep 1999

Conference

ConferenceProceedings of the 1999 the 9th International Conference on 'Artificial Neural Networks (ICANN99)'
CityEdinburgh, UK
Period7/09/9910/09/99

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