A different class of hardware environment, an FPGA-based reconfigurable computing environment for implementing neural networks, is developed. FPGAs offer speed comparable to dedicated and fixed hardware systems for parallel algorithm acceleration while, as with a software implementation, retaining a high degree of flexibility for device reconfiguration as the application demands. Such an FPGA based hardware environment is not only capable of implementing different size and forms of neural networks on the same hardware device, but it also capable of supporting the dynamic creation and modification of neural network topologies.
|Title of host publication||IEE Conference Publication|
|Number of pages||6|
|Publication status||Published - 1 Dec 1999|
|Event||Proceedings of the 1999 the 9th International Conference on 'Artificial Neural Networks (ICANN99)' - Edinburgh, UK|
Duration: 7 Sep 1999 → 10 Sep 1999
|Conference||Proceedings of the 1999 the 9th International Conference on 'Artificial Neural Networks (ICANN99)'|
|Period||7/09/99 → 10/09/99|