Abstract
This work presents results of a study of electronic transport in state-of-the-art SOI transistors. Geometrical magnetoresistance measurements, performed at magnetic field intensities up to 15 T, and high-resolution mobility spectrum analysis were employed to characterise the mobility distribution of electrons in the inversion layer of fully-depleted silicon-on-insulator nMOS transistors. The results reveal a broad room-temperature electron mobility distribution that significantly departs from the ideal single discrete carrier case. At temperatures below 60 K, the linewidth of the distribution is shown to become significantly narrower, approaching a delta-like mobility function. To the best of our knowledge, electron mobility distributions in Si-based devices have not been previously studied nor resolved in such detail.
Original language | English |
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Title of host publication | 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2020 |
Publisher | IEEE, Institute of Electrical and Electronics Engineers |
ISBN (Electronic) | 9781728187655 |
DOIs | |
Publication status | Published - 1 Sept 2020 |
Event | 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2020 - Caen, France Duration: 1 Sept 2020 → 30 Sept 2020 |
Conference
Conference | 2020 Joint International EUROSOI Workshop and International Conference on Ultimate Integration on Silicon, EUROSOI-ULIS 2020 |
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Country/Territory | France |
City | Caen |
Period | 1/09/20 → 30/09/20 |