Systolic Arrays for Implementation of Finite Memory Filters

Victor Sreeram, F. El Guibaly, P. Agathoklis

    Research output: Contribution to journalArticle

    Abstract

    Hardware implementations of 1-D finite memory filters are presented. Two types of realizations of finite memory filters are considered: non-recursive and recursive. The hardware implementation of these filters is based on systolic array architecture. Linear arrays are proposed for the implementation of both non-recursive and recursive filters. Further, two different schemes are proposed for the recursive filter. All these implementations are discussed using performance measures such as latency, delay, duration and input/output data rate.
    Original languageEnglish
    Pages (from-to)37-44
    JournalInternational Journal of Electronics
    Volume72
    Issue numberNo 1
    DOIs
    Publication statusPublished - 1992

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