Programmable rate-based scheduler (PRS) for ATM switches and multiplexers

P. C. Wong, K. C. Yee, A. Cantoni, Guven Mercankosk

Research output: Contribution to conferenceConference presentation/ephemerapeer-review

Abstract

We consider the Virtual Clock Scheduling (VCS) algorithm and propose a Time-Priority Model (TPM) for illustrating the algorithm. We show that TPM can represent many time-dependent priority schemes such as FCFS, LCFS, RR, EDF and VGS. Based on TPM, we derive an enhanced virtual clock scheme, Gated Virtual Clock Scheduling (GVCS), which gives the same throughput and delivery guarantee as VCS, but gives a smaller delay for low-rate streams. We consider the implementation of TPM and propose a Programmable Rate-based Scheduler (PRS) which can be programmed at any time to change its configuration or discipline.

Original languageEnglish
Pages827-832
Number of pages6
Publication statusPublished - 1 Dec 1997
Externally publishedYes
EventProceedings of the 1997 IEEE Global Telecommunications Conference. Part 2 (of 3) - Phoenix, AZ, USA
Duration: 3 Nov 19978 Nov 1997

Conference

ConferenceProceedings of the 1997 IEEE Global Telecommunications Conference. Part 2 (of 3)
CityPhoenix, AZ, USA
Period3/11/978/11/97

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