[Truncated abstract] Recent advances in semiconductor fabrication technology have enabled the concept of a single camera-on-a-chip, which integrates all camera functions onto a single piece of silicon. To enable the concept of low cost and high performance miniature camera-on-a-chip, the proposed research aims at developing advanced real-time digital image processing (DIP) cores or modules that could be integrated together with the photo-sensing pixel array. The developed DIP cores address the stringent requirements of compactness, low-power, and real-time operation to enable their integration into a variety of low cost portable consumer imaging products. This work first presents a multi-precision reconfigurable multiplier, which incorporates variable precision, parallel processing, razor-based dynamic voltage scaling (DVS), and dedicated multi-precision operands scheduling to realize full energy and performance flexibility and efficiency. According to user’s arbitrary requirements (eg. throughput), the dynamic voltage and frequency scaling management unit first configures the multiplier operating at the proper precision and frequency. Adapting to the run-time workload of the targeted application, razor flip-flops and the dithering voltage unit assist the voltage and frequency scaling management units to autonomously configure the multiplier to work at the minimum possible power operating point to achieve the minimized power consumption. This multi-precision multiplier is coupled with an operands scheduler, which can analyze and rearrange the input data to achieve the optimal voltage and frequency combinations to further reduce the overall power consumption. Our work successfully demonstrates through a fabricated prototype that multi-precision architecture can reap the benefits from dynamic voltage scaling techniques more effectively, which enables the efficient use for DIP applications.
|Qualification||Doctor of Philosophy|
|Publication status||Unpublished - 2011|