TY - JOUR
T1 - Power analysis attack resistable hardware cryptographical circuit design using reversible logic gate in quantum cellular automata
AU - Pain, Puspak
AU - Das, Kunal
AU - Sadhu, Arindam
AU - Kanjilal, Maitreyi Ray
AU - De, Debashis
PY - 2022/3
Y1 - 2022/3
N2 - Quantum-dot cellular automata (QCA) technology leads to rapid high-density combinatory low power exploitation to realize the reversible logic circuit in the nanoscale era. Reversible logic is an alternative to overcome excess energy indulgence of irreversible process. This paper illustrates a cost-effective, energy-efficient Universal Reversible Logic Gate in QCA framework which is capable of designing power analysis attack resistable hardware cryptographical circuit. The proposed (URLGs: U1 and U2) has been tested with simulator QCADesigner V2.0.3, outshined the existing pattern relating to the area, gate count, garbage count, and quantum cost. We found 37.5% garbage minimization is achieved compared to NFT, which is utmost minimization of garbage ever reported in QCA literature. Thirteen three variable standard Boolean functions are considered as logic benchmarks to guesstimate the capability and efficiency of proposed URLG in QCA circuit implementation and synthesizing logic gates. In average, our proposed U2 achieved 36.66% improvement in energy dissipation for different kink energy ratios over early reported work.
AB - Quantum-dot cellular automata (QCA) technology leads to rapid high-density combinatory low power exploitation to realize the reversible logic circuit in the nanoscale era. Reversible logic is an alternative to overcome excess energy indulgence of irreversible process. This paper illustrates a cost-effective, energy-efficient Universal Reversible Logic Gate in QCA framework which is capable of designing power analysis attack resistable hardware cryptographical circuit. The proposed (URLGs: U1 and U2) has been tested with simulator QCADesigner V2.0.3, outshined the existing pattern relating to the area, gate count, garbage count, and quantum cost. We found 37.5% garbage minimization is achieved compared to NFT, which is utmost minimization of garbage ever reported in QCA literature. Thirteen three variable standard Boolean functions are considered as logic benchmarks to guesstimate the capability and efficiency of proposed URLG in QCA circuit implementation and synthesizing logic gates. In average, our proposed U2 achieved 36.66% improvement in energy dissipation for different kink energy ratios over early reported work.
UR - http://www.scopus.com/inward/record.url?scp=85071138880&partnerID=8YFLogxK
U2 - 10.1007/s00542-019-04581-2
DO - 10.1007/s00542-019-04581-2
M3 - Article
AN - SCOPUS:85071138880
SN - 0946-7076
VL - 28
SP - 779
EP - 791
JO - Microsystem Technologies
JF - Microsystem Technologies
IS - 3
ER -