Novel low power reversible binary incrementer design using quantum-dot cellular automata

J.C. Das, Debashis De

    Research output: Contribution to journalArticle

    31 Citations (Scopus)

    Abstract

    © 2015 Elsevier B.V. All rights reserved. This paper demonstrates the design of n-bit novel low power reversible binary incrementer in Quantum-Dot Cellular Automata (QCA). The comparison of quantum cost in quantum gate based approach and in QCA based design agreed the cost efficient implementation in QCA. The power dissipation by proposed circuit is estimated, which shows that the circuit dissipates very low heat energy suitable for reversible computing. All the circuits are evaluated in terms of logic gates, circuit density and latency that confirm the faster operating speed at nano scale. The reliability of the circuit under thermal randomness is explored which describes the efficiency of the circuit.
    Original languageEnglish
    Pages (from-to)10-23
    JournalMicroprocessors and Microsystems
    Volume42
    DOIs
    Publication statusPublished - 2016

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    Cellular automata
    Semiconductor quantum dots
    Networks (circuits)
    Logic gates
    Costs
    Energy dissipation

    Cite this

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    abstract = "{\circledC} 2015 Elsevier B.V. All rights reserved. This paper demonstrates the design of n-bit novel low power reversible binary incrementer in Quantum-Dot Cellular Automata (QCA). The comparison of quantum cost in quantum gate based approach and in QCA based design agreed the cost efficient implementation in QCA. The power dissipation by proposed circuit is estimated, which shows that the circuit dissipates very low heat energy suitable for reversible computing. All the circuits are evaluated in terms of logic gates, circuit density and latency that confirm the faster operating speed at nano scale. The reliability of the circuit under thermal randomness is explored which describes the efficiency of the circuit.",
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    Novel low power reversible binary incrementer design using quantum-dot cellular automata. / Das, J.C.; De, Debashis.

    In: Microprocessors and Microsystems, Vol. 42, 2016, p. 10-23.

    Research output: Contribution to journalArticle

    TY - JOUR

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    AU - Das, J.C.

    AU - De, Debashis

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    AB - © 2015 Elsevier B.V. All rights reserved. This paper demonstrates the design of n-bit novel low power reversible binary incrementer in Quantum-Dot Cellular Automata (QCA). The comparison of quantum cost in quantum gate based approach and in QCA based design agreed the cost efficient implementation in QCA. The power dissipation by proposed circuit is estimated, which shows that the circuit dissipates very low heat energy suitable for reversible computing. All the circuits are evaluated in terms of logic gates, circuit density and latency that confirm the faster operating speed at nano scale. The reliability of the circuit under thermal randomness is explored which describes the efficiency of the circuit.

    U2 - 10.1016/j.micpro.2015.12.004

    DO - 10.1016/j.micpro.2015.12.004

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    EP - 23

    JO - Microprocessors and Microsystems

    JF - Microprocessors and Microsystems

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