New design for a frame sampling synchronizer

Jacqueline Walker, Antonio Cantoni

Research output: Contribution to journalConference article

7 Citations (Scopus)

Abstract

This paper proposes a new design for a frame sampling synchronizer and gives some typical applications for the device. It also discusses metastability which arises in the system due to the existence of asynchronous inputs. The motivation for the new design, details of the design and its modelling are also covered. Finally the jitter generated by the synchronizer is analyzed.

Original languageEnglish
Pages (from-to)97-100
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume3
Publication statusPublished - 1 Dec 1994
Externally publishedYes
EventProceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) - London, England
Duration: 30 May 19942 Jun 1994

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