Memristor modelling

B. Muthuswamy, J. Jevtic, Ho Ching Iu, C.K. Subramaniam, K.A. Ganesan, V. Sankaranarayanan, K. Sethupathi, H. Kim, M.P. Shah, L. Chua

    Research output: Chapter in Book/Conference paperConference paper

    5 Citations (Scopus)

    Abstract

    In this paper, we show a simple circuit setup for experimentally plotting the v - i non-transversal pinched-hysteresis Lissajous fingerprint of a physical memristor - the common fluorescent gas discharge tube. The setup helped us investigate the effects of physical parasitics (inductors and capacitors) on the memristor v - i. © 2014 IEEE.
    Original languageEnglish
    Title of host publicationCircuits and Systems (ISCAS), 2014 IEEE International Symposium on
    PublisherIEEE, Institute of Electrical and Electronics Engineers
    Pages490-493
    ISBN (Print)9781479934324
    DOIs
    Publication statusPublished - 2014
    EventMemristor modelling - Melbourne, Australia
    Duration: 1 Jan 2014 → …

    Conference

    ConferenceMemristor modelling
    Period1/01/14 → …

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    Cite this

    Muthuswamy, B., Jevtic, J., Iu, H. C., Subramaniam, C. K., Ganesan, K. A., Sankaranarayanan, V., ... Chua, L. (2014). Memristor modelling. In Circuits and Systems (ISCAS), 2014 IEEE International Symposium on (pp. 490-493). IEEE, Institute of Electrical and Electronics Engineers. https://doi.org/10.1109/ISCAS.2014.6865179