LeakyDSP: Exploiting Digital Signal Processing Blocks to Sense Voltage Fluctuations in FPGAs

Research output: Chapter in Book/Conference paperConference paperpeer-review

Abstract

In recent years, cloud providers are dedicated to enabling FPGA multi-tenancy to improve resource utilization, but this new sharing model introduces power side-channel threats, where attackers detect voltage fluctuations from colocated circuits. This paper proposes LeakyDSP, a novel onchip sensor that maliciously configures DSP blocks to sense fine-grained voltage fluctuations but is overlooked by existing studies. Our experimental results show that LeakyDSP achieves high sensitivity to voltage fluctuations and strong robustness to different placements. Besides, we apply LeakyDSP to extract full AES keys with $25 \mathrm{k}-78 \mathrm{k}$ traces and build covert channels with a high transmission rate of 247.94 bit/s.
Original languageEnglish
Title of host publication62nd ACM/IEEE Design Automation Conference 2025
Place of PublicationUSA
PublisherIEEE DataPort
Pages1-7
Number of pages7
ISBN (Electronic)9798331503048
ISBN (Print)979-8-3315-0305-5
DOIs
Publication statusPublished - 15 Sept 2025
Event62nd ACM/IEEE Design Automation Conference (DAC) 2025 - San Francisco, United States
Duration: 22 Jun 202525 Jun 2025

Publication series

NameProceedings - Design Automation Conference
ISSN (Print)0738-100X

Conference

Conference62nd ACM/IEEE Design Automation Conference (DAC) 2025
Country/TerritoryUnited States
CitySan Francisco
Period22/06/2525/06/25

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