LDD Depletion Effects in Thin-BOX FDSOI Devices with a Ground Plane

R. Yan, R. Duane, P. Razavi, A. Afzalian, I. Ferain, C. W. Lee, N. Dehdashti-Akhavan, K. Bourdelle, B. Y. Nguyen, J. P. Colinge

Research output: Chapter in Book/Conference paperConference paper

9 Citations (Scopus)


In this paper, we analyze LDD depletion effects in Fully-Depleted SOI (FDSOI) devices with thin-BOX and ground plane (GP). LDD engineering is introduced to reduce the source and drain resistance and threshold voltage shifts. Short-channel effects are rather insensitive to SOI layer thickness variations and remains well controlled for gate lengths down to 15nm.

Original languageEnglish
Title of host publication2009 IEEE INTERNATIONAL SOI CONFERENCE
PublisherWiley-IEEE Press
Number of pages2
ISBN (Print)978-1-4244-4256-0
Publication statusPublished - 2009
EventIEEE International SOI Conference 2009 - Foster City, Canada
Duration: 5 Oct 20098 Oct 2009


ConferenceIEEE International SOI Conference 2009
CityFoster City

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