Influence of Gate Underlap in AM and IM MuGFETs

Chi-Woo Lee, Aryan Afzalian, Ran Yan, Nima Dehdashti, Weize Xiong, Jean-Pierre Colinge

Research output: Chapter in Book/Conference paperConference paper

Abstract

The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode (AM) devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode (IM) FETs.

Original languageEnglish
Title of host publicationESSDERC 2008: PROCEEDINGS OF THE 38TH EUROPEAN SOLID-STATE DEVICE RESEARCH CONFERENCE
EditorsS Hall, A Walton
PublisherWiley-IEEE Press
Pages238-+
Number of pages2
ISBN (Print)978-1-4244-2363-7
DOIs
Publication statusPublished - 2008
Event38th European Solid-State Device Research Conference - Edinburgh
Duration: 15 Sep 200819 Sep 2008

Publication series

NameProceedings of the European Solid-State Device Research Conference
PublisherIEEE
ISSN (Print)1930-8876

Conference

Conference38th European Solid-State Device Research Conference
CityEdinburgh
Period15/09/0819/09/08

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