High-Temperature Performance of Silicon Junctionless MOSFETs

Chi-Woo Lee; Adrien Borne; Isabelle Ferain; Aryan Afzalian; Ran Yan; Nima Dehdashti Akhavan; Pedram Razavi; Jean-Pierre Colinge

doi:10.1109/TED.2009.2039093

High-Temperature Performance of Silicon Junctionless MOSFETs

Chi-Woo Lee, Adrien Borne, Isabelle Ferain, Aryan Afzalian, Ran Yan, Nima Dehdashti Akhavan, Pedram Razavi, Jean-Pierre Colinge

School of Engineering

Research output: Contribution to journal › Article › peer-review

346 Citations (Scopus)

Abstract

This paper investigates the temperature dependence of the main electrical parameters of junctionless (JL) silicon nanowire transistors. Direct comparison is made to silicon nanowire (trigate) MOSFETs. Variation of parameters such as threshold voltage and ON-OFF current characteristics is analyzed. The JL silicon nanowire FET has a lager variation of threshold voltage with temperature than the standard inversion- and accumulation-mode FETs. Unlike in classical devices, the drain current of JL FETs increases when temperature is increased.

Original language	English
Pages (from-to)	620-625
Number of pages	6
Journal	IEEE Transactions on Electron Devices
Volume	57
Issue number	3
DOIs	https://doi.org/10.1109/TED.2009.2039093
Publication status	Published - Mar 2010

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title = "High-Temperature Performance of Silicon Junctionless MOSFETs",

abstract = "This paper investigates the temperature dependence of the main electrical parameters of junctionless (JL) silicon nanowire transistors. Direct comparison is made to silicon nanowire (trigate) MOSFETs. Variation of parameters such as threshold voltage and ON-OFF current characteristics is analyzed. The JL silicon nanowire FET has a lager variation of threshold voltage with temperature than the standard inversion- and accumulation-mode FETs. Unlike in classical devices, the drain current of JL FETs increases when temperature is increased.",

keywords = "High temperature, junctionless (JL) FET, multiple-gate MOSFET, silicon nanowire FET, MODEL",

author = "Chi-Woo Lee and Adrien Borne and Isabelle Ferain and Aryan Afzalian and Ran Yan and Akhavan, {Nima Dehdashti} and Pedram Razavi and Jean-Pierre Colinge",

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AU - Lee, Chi-Woo

AU - Borne, Adrien

AU - Ferain, Isabelle

AU - Afzalian, Aryan

AU - Yan, Ran

AU - Akhavan, Nima Dehdashti

AU - Razavi, Pedram

AU - Colinge, Jean-Pierre

PY - 2010/3

Y1 - 2010/3

N2 - This paper investigates the temperature dependence of the main electrical parameters of junctionless (JL) silicon nanowire transistors. Direct comparison is made to silicon nanowire (trigate) MOSFETs. Variation of parameters such as threshold voltage and ON-OFF current characteristics is analyzed. The JL silicon nanowire FET has a lager variation of threshold voltage with temperature than the standard inversion- and accumulation-mode FETs. Unlike in classical devices, the drain current of JL FETs increases when temperature is increased.

AB - This paper investigates the temperature dependence of the main electrical parameters of junctionless (JL) silicon nanowire transistors. Direct comparison is made to silicon nanowire (trigate) MOSFETs. Variation of parameters such as threshold voltage and ON-OFF current characteristics is analyzed. The JL silicon nanowire FET has a lager variation of threshold voltage with temperature than the standard inversion- and accumulation-mode FETs. Unlike in classical devices, the drain current of JL FETs increases when temperature is increased.

KW - High temperature

KW - junctionless (JL) FET

KW - multiple-gate MOSFET

KW - silicon nanowire FET

KW - MODEL

U2 - 10.1109/TED.2009.2039093

DO - 10.1109/TED.2009.2039093

M3 - Article

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VL - 57

SP - 620

EP - 625

JO - IEEE Transactions on Electron Devices

JF - IEEE Transactions on Electron Devices

IS - 3

ER -

High-Temperature Performance of Silicon Junctionless MOSFETs

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