Frequency steered phase locked loop

Research output: Contribution to conferenceConference presentation/ephemera


Voltage controlled oscillators (VCOs) implemented in digital VLSI IC (integrated circuit) technology typically have very poorly controlled centre frequencies and poor phase noise characteristics, thus severely limiting their use in phase locked loop (PLL) applications. The new technique presented here incorporates an accurate local reference frequency into the PLL structure. The key parameters of the new PLL structure are identified and the performance characterized. It is shown that the range of frequencies to which the new PLL structure can lock can be confined to a small region around the accurate local reference frequency. It is also shown that the new PLL structure provides other benefits such as reduction of VCO phase noise, allowing poor quality VCOs to be used in demanding applications. The new technique does not require any monitoring nor any switching of the local frequency reference signal which is always acting.

Original languageEnglish
Number of pages6
Publication statusPublished - 1 Jan 1997
Externally publishedYes
EventProceedings of the 1997 IEEE International Performance Computing & Communications Conference - Phoenix, AZ, USA
Duration: 5 Feb 19977 Feb 1997


ConferenceProceedings of the 1997 IEEE International Performance Computing & Communications Conference
CityPhoenix, AZ, USA

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