Enabling high-porosity porous silicon as an electronic material

High porosity porous silicon holds great promise for applications such as sensing where large surface area is required. However electrical measurements of such films, and implementation into electronic devices, have thus far been limited due to the high electrical resistance and low mechanical strength of high porosity films. In this work, microfabrication processes were refined and then implemented to enable electrical studies of films with porosity as high as 81%. Optimisation of electrical properties is a critical step towards use of the material in microelectronic and optoelectronic sensors. The impact of the measurement technique itself was also evaluated since this can be significant for these relatively fragile (high porosity induced low modulus) films. Film resistivity and current-voltage (I–V) relationships were measured with a sandwich metal/porous silicon/silicon/metal structure. Process temperatures were found to have a profound effect on both the film conductivity and the contact between metal/porous silicon. Porous silicon film resistivity change was abstracted from I–V curves after annealing at temperatures from 300 °C to 600 °C, indicating a decrease in resistivity by 10⁷, while typical micromachining processes including HF immersion, repeated annealing and alkali based developer immersion were all found to affect the electrical properties. Our studies revealed for lateral current flow PS devices as opposed to vertical current flow devices, any leakage current through the silicon substrate needed to be reduced below 10 nA/mm² for an effective current pathway through the porous silicon to be maintained, due to the extremely high resistivity (>10⁵ Ω cm) associated with high porosity (large surface area) films. Therefore methods to electrically isolate the porous silicon from the substrate were investigated to ensure that the porous film is the dominant contribution to the measurement.