Design, Dynamical Analysis, and Hardware Implementation of a Novel Memcapacitive Hyperchaotic Logistic Map

Suo Gao, Herbert Ho Ching Iu, Ugur Erkan, Cemaleddin Simsek, Jun Mou, Abdurrahim Toktas, Rui Wu, Xianglong Tang

Research output: Contribution to journalArticlepeer-review

Abstract

Currently, discrete memristors are a focal point in the study of chaotic mappings. Similar to memristors, memcapacitors—another type of memory circuit component—have not received widespread attention in the design of chaotic mappings. In this paper, we propose a four-dimensional memcapacitive hyperchaotic Logistic map (4D-MHLM) by integrating memcapacitors with the Logistic map. The dynamical behavior of the 4D-MHLM is analyzed using Lyapunov exponent analysis, and the impact of different parameters on system performance is discussed. The complexity of generating pseudo-random sequences with the 4D-MHLM is investigated through complexity analysis, including SE complexity and C0 complexity. Notably, attractor analysis reveals a unique phenomenon of infinite coexisting attractors within the 4D-MHLM. Finally, the chaotic attractor generated by the 4D-MHLM is successfully implemented on a hardware platform. Theoretical analysis and digital circuit implementation results indicate that the 4D-MHLM exhibits rich dynamical behavior and higher complexity, offering significant value for practical applications.

Original languageEnglish
JournalIEEE Internet of Things Journal
DOIs
Publication statusAccepted/In press - 10 Jun 2024

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