Compiling process algebraic descriptions into reconfigurable logic

Oliver Diessel, George Milne

Research output: Chapter in Book/Conference paperConference paperpeer-review

5 Citations (Scopus)

Abstract

Reconfigurable computers based on field programmable gate array technology allow applications to be realized directly in digital logic. The inherent concurrency of hardware distinguishes such computers from microprocessor-based machines in which the concurrency of the underlying hardware is fixed and abstracted from the programmer by the software model. However, reconfigurable logic allows the potential to exploit "real" concurrency. We are therefore interested in knowing how to exploit this concurrency, how to model concurrent computations, and which languages allow us to control the hardware most effectively. The purpose of this paper is to demonstrate that behavioural descriptions expressed in a process algebraic language can be readily and intuitively compiled to reconfigurable logic and that this contributes to the goal of discovering appropriate high-level languages for run-time reconfiguration.

Original languageEnglish
Title of host publicationParallel and Distributed Processing - 15 IPDPS 2000 Workshops, Proceedings
Pages916-923
Number of pages8
Publication statusPublished - 1 Dec 2000
Externally publishedYes
Event15 Workshops Held in Conjunction with the IEEE International Parallel and Distributed Processing Symposium - Cancun, Mexico
Duration: 1 May 20005 May 2000

Publication series

NameLecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
Volume1800 LNCS
ISSN (Print)0302-9743
ISSN (Electronic)1611-3349

Conference

Conference15 Workshops Held in Conjunction with the IEEE International Parallel and Distributed Processing Symposium
Abbreviated titleIPDPS 2000
Country/TerritoryMexico
CityCancun
Period1/05/005/05/00

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