Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs

Chi-Woo Lee, Dimitri Lederer, Aryan Afzalian, Ran Yan, Nima Dehdashti, Weize Xiong, Jean-Pierre Colinge

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The performances of accumulation-mode and inversion-mode multigate FETs are compared. The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode FETs. (C) 2008 Elsevier Ltd. All rights reserved.

Original languageEnglish
Pages (from-to)1815-1820
Number of pages6
JournalSolid-State Electronics
Issue number11
Publication statusPublished - Nov 2008

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