Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs

Chi-Woo Lee; Dimitri Lederer; Aryan Afzalian; Ran Yan; Nima Dehdashti; Weize Xiong; Jean-Pierre Colinge

doi:10.1016/j.sse.2008.09.006

Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs

Chi-Woo Lee, Dimitri Lederer, Aryan Afzalian, Ran Yan, Nima Dehdashti, Weize Xiong, Jean-Pierre Colinge

School of Engineering

Research output: Contribution to journal › Article › peer-review

20 Citations (Scopus)

Abstract

The performances of accumulation-mode and inversion-mode multigate FETs are compared. The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode FETs. (C) 2008 Elsevier Ltd. All rights reserved.

Original language	English
Pages (from-to)	1815-1820
Number of pages	6
Journal	Solid-State Electronics
Volume	52
Issue number	11
DOIs	https://doi.org/10.1016/j.sse.2008.09.006
Publication status	Published - Nov 2008

Access to Document

10.1016/j.sse.2008.09.006

Cite this

@article{b4fd6f8788634c55a57dc1e7127a6075,

title = "Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs",

abstract = "The performances of accumulation-mode and inversion-mode multigate FETs are compared. The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode FETs. (C) 2008 Elsevier Ltd. All rights reserved.",

keywords = "Accumulation-mode, Silicon-on-insulator, Multigate MOSFET, HIGH-PERFORMANCE, SOI MOSFETS, GATE, DEVICES",

author = "Chi-Woo Lee and Dimitri Lederer and Aryan Afzalian and Ran Yan and Nima Dehdashti and Weize Xiong and Jean-Pierre Colinge",

year = "2008",

month = nov,

doi = "10.1016/j.sse.2008.09.006",

language = "English",

volume = "52",

pages = "1815--1820",

journal = "Solid-State Electronics",

issn = "0038-1101",

publisher = "Pergamon",

number = "11",

}

TY - JOUR

T1 - Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs

AU - Lee, Chi-Woo

AU - Lederer, Dimitri

AU - Afzalian, Aryan

AU - Yan, Ran

AU - Dehdashti, Nima

AU - Xiong, Weize

AU - Colinge, Jean-Pierre

PY - 2008/11

Y1 - 2008/11

N2 - The performances of accumulation-mode and inversion-mode multigate FETs are compared. The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode FETs. (C) 2008 Elsevier Ltd. All rights reserved.

AB - The performances of accumulation-mode and inversion-mode multigate FETs are compared. The influence of gate underlap on the electrical properties is analyzed. Both simulation results and experimental data show that in a device with gate underlap, accumulation-mode devices have a higher current drive, lower source and drain resistance and less process variability than inversion-mode FETs. (C) 2008 Elsevier Ltd. All rights reserved.

KW - Accumulation-mode

KW - Silicon-on-insulator

KW - Multigate MOSFET

KW - HIGH-PERFORMANCE

KW - SOI MOSFETS

KW - GATE

KW - DEVICES

U2 - 10.1016/j.sse.2008.09.006

DO - 10.1016/j.sse.2008.09.006

M3 - Article

SN - 0038-1101

VL - 52

SP - 1815

EP - 1820

JO - Solid-State Electronics

JF - Solid-State Electronics

IS - 11

ER -

Comparison of contact resistance between accumulation-mode and inversion-mode multigate FETs

Abstract

Access to Document

Fingerprint

Cite this