Abstract
A circuit consisting of four NOR gates multiplies modulo-seven integers, represented by binary digits on three input lines, by six. In modulo-seven arithmetic, this is equivalent to negation, and the circuit is a negator. Negators, together with standard flip-flops and half adders, yield all primitive components needed for binary-coded modulo-seven linear sequential networks.
Original language | English |
---|---|
Pages (from-to) | 184-185 |
Number of pages | 2 |
Journal | Electronics Letters |
Volume | 7 |
Issue number | 8 |
DOIs | |
Publication status | Published - 22 Apr 1971 |