TY - JOUR
T1 - Analytical model for the high-temperature behaviour of the subthreshold slope in MuGFETs
AU - Lee, Chi-Woo
AU - Lederer, Dimitri
AU - Afzalian, Aryan
AU - Yan, Ran
AU - Akhavan, Nima Dehdashti
AU - Colinge, Jean-Pierre
PY - 2009/10
Y1 - 2009/10
N2 - As MuGFETs are promising contenders for the end of the silicon Roadmap, their high-temperature behaviour needs to be addressed. In this work we investigate the variations of the subthreshold slope (SS) of double-gate devices and MuGFETs with intrinsic doping as a function of the temperature and fin width. Focus is placed on the superlinear behaviour of SS occurring above a certain temperature threshold. Numerical simulations are performed using Comsol Multiphysics (TM) and a 1D analytical model is developed. The model, which includes the effect of film and gate oxide thickness, is shown to accurately fit the numerical data. A new definition for the subthreshold slope under high-temperature operation is proposed. The high-temperature subthreshold slope degradation is shown to increase with fin width. (C) 2009 Elsevier B.V. All rights reserved.
AB - As MuGFETs are promising contenders for the end of the silicon Roadmap, their high-temperature behaviour needs to be addressed. In this work we investigate the variations of the subthreshold slope (SS) of double-gate devices and MuGFETs with intrinsic doping as a function of the temperature and fin width. Focus is placed on the superlinear behaviour of SS occurring above a certain temperature threshold. Numerical simulations are performed using Comsol Multiphysics (TM) and a 1D analytical model is developed. The model, which includes the effect of film and gate oxide thickness, is shown to accurately fit the numerical data. A new definition for the subthreshold slope under high-temperature operation is proposed. The high-temperature subthreshold slope degradation is shown to increase with fin width. (C) 2009 Elsevier B.V. All rights reserved.
KW - High temperature
KW - Multiple-gate MOSFET
KW - Subthreshold slope
KW - GATE SOI MOSFETS
KW - TRANSISTORS
U2 - 10.1016/j.mee.2009.01.061
DO - 10.1016/j.mee.2009.01.061
M3 - Article
VL - 86
SP - 2067
EP - 2071
JO - Microelectronic Engineering
JF - Microelectronic Engineering
SN - 0167-9317
IS - 10
ER -