A novel ultra-low power operating technique ispresented for Mega-pixels current-mediated CMOS imagers.In the proposed technique, the reset and read-out phasesoccur simultaneously: as a single pixel is being read-outanother pixel is being reset. Such a strategy reduces powerconsumption by more than 2 orders of magnitude for currentmediatedMega-pixels CMOS imagers, while still allowing foron-read-out fixed pattern noise correction. Powerconsumption becomes independent of both read-out speed andimager array size. Additionally, the proposed operatingtechnique leads to improved linearity for the pixel response,increased dynamic range as well as on-chip digital shutterfunctionality. A single additional address decoder is requiredto generate the reset signals, resulting in a marginal increasein silicon area. The wiring overhead is kept to a minimum withonly a single control signal required to operate the currentmediatedCMOS imager1.