Frequency Hopping (FH) is a significant anti-interception and anti-interference, so some wireless communication systems extensively use it. Then it can offer better security performance of the system via combining cryptographic algorithms with FH. This paper presents a detailed theoretical design and hardware implementation of an evolutionary ZUC stream cipher algorithm on FPGA. Using some encryption algorithms can improve the security of the FH system by increasing its complexity, including SNOW3g, ZUC algorithm, Chaos system, and other cipher methods. ZUC (named for Zu Chongzhi, a famous mathematician in ancient China) is bitstream encryption that builds the core of the 3GPP integrity algorithm 128-EIA3 and the 3GPP confidentiality algorithm 128-EEA3, providing authentic security services in 4G, even in 5G (IMT-2020) to some extent. The article presented an evolutionary three-layers structure of the ZUC FH system, which innovatively applied the permutation polynomial algorithm and an evolutionary DES cipher algorithm. The introduction of that new DES and the permutation polynomial can efficiently increase the security performance of the ZUC system but also avoid some shortcomings of the UHF (Ultra High Frequency) communication. The experiment of this research designed software by coding VHDL language and implemented hardware using a XILINX Virtex-5 FPGA. The finished experiment gave, analyzed, and compared all results according to the performance of the proposed system and hardware resources. The tests for evaluating the randomness and security denote that the constructed sequences have better performance, including the randomness, linear complexity, and hamming correlations, and pass the NIST test finally. The experimental results show that this improved ZUC cipher stream algorithm proposed in the article can provide a high throughput of 2.08 Gbps under a 65MHz clock frequency. The authors will focus their future work on applying the evolutionary S-box and the algorithm with better security performance.