A new synchronizer design

Jacqueline Walker, Antonio Cantoni

    Research output: Contribution to journalArticlepeer-review

    4 Citations (Web of Science)


    A new synchronizer design is presented. Current synchronizer designs have certain disadvantages, both in characterization and in the tradeoff between settling time and sampling rate, which are overcome in the new design. Two possible implementations of the synchronizer are discussed.

    Original languageEnglish
    Pages (from-to)1308-1311
    Number of pages4
    JournalIEEE Transactions on Computers
    Issue number11
    Publication statusPublished - 1 Dec 1996


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