A detailed analysis of phase locked loops used in clock jitter reduction

S Abeysekera, A Cantoni

Research output: Chapter in Book/Conference paper › Chapter › peer-review

Original language	English
Title of host publication	Digital Signal Processing for Communication Systems
Editors	T Wysocki, H Razavi, B Honary
Publisher	Springer
Pages	243-253
Number of pages	11
Volume	1
ISBN (Print)	978-1-4615-6119-4
Publication status	Published - 1996

Cite this

@inbook{676813ed1c1544f19582be1252167c94,

title = "A detailed analysis of phase locked loops used in clock jitter reduction",

author = "S Abeysekera and A Cantoni",

year = "1996",

language = "English",

isbn = "978-1-4615-6119-4",

volume = "1",

pages = "243--253",

editor = "T Wysocki and H Razavi and B Honary",

booktitle = "Digital Signal Processing for Communication Systems",

publisher = "Springer",

address = "Netherlands",

}