A Design for FPGA Implementation of the Probabilistic Neural Network

G. Minchin; Anthony Zaknich

A Design for FPGA Implementation of the Probabilistic Neural Network

G. Minchin, Anthony Zaknich

Research output: Chapter in Book/Conference paper › Conference paper › peer-review

Original language	English
Title of host publication	ICONIP'99 6th International Conference on Neural Information Processing Proceedings
Editors	T. Gedeon, P. Wong, S. Halgamuge, N. Kasabov, D. Nauck, K. Fukushima
Place of Publication	Perth, WA
Publisher	IEEE, Institute of Electrical and Electronics Engineers
Pages	556-559
Volume	2
Edition	Perth, WA
ISBN (Print)	0780358716
Publication status	Published - 1999
Event	A Design for FPGA Implementation of the Probabilistic Neural Network - Perth, WA Duration: 1 Jan 1999 → …

Conference

Conference	A Design for FPGA Implementation of the Probabilistic Neural Network
Period	1/01/99 → …

Cite this

Minchin, G. ; Zaknich, Anthony. / A Design for FPGA Implementation of the Probabilistic Neural Network. ICONIP'99 6th International Conference on Neural Information Processing Proceedings. editor / T. Gedeon ; P. Wong ; S. Halgamuge ; N. Kasabov ; D. Nauck ; K. Fukushima. Vol. 2 Perth, WA. ed. Perth, WA : IEEE, Institute of Electrical and Electronics Engineers, 1999. pp. 556-559

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title = "A Design for FPGA Implementation of the Probabilistic Neural Network",

author = "G. Minchin and Anthony Zaknich",

year = "1999",

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booktitle = "ICONIP'99 6th International Conference on Neural Information Processing Proceedings",

publisher = "IEEE, Institute of Electrical and Electronics Engineers",

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edition = "Perth, WA",

note = "A Design for FPGA Implementation of the Probabilistic Neural Network ; Conference date: 01-01-1999",

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Minchin, G & Zaknich, A 1999, A Design for FPGA Implementation of the Probabilistic Neural Network. in T Gedeon, P Wong, S Halgamuge, N Kasabov, D Nauck & K Fukushima (eds), ICONIP'99 6th International Conference on Neural Information Processing Proceedings. Perth, WA edn, vol. 2, IEEE, Institute of Electrical and Electronics Engineers, Perth, WA, pp. 556-559, A Design for FPGA Implementation of the Probabilistic Neural Network, 1/01/99.

A Design for FPGA Implementation of the Probabilistic Neural Network. / Minchin, G.; Zaknich, Anthony.
ICONIP'99 6th International Conference on Neural Information Processing Proceedings. ed. / T. Gedeon; P. Wong; S. Halgamuge; N. Kasabov; D. Nauck; K. Fukushima. Vol. 2 Perth, WA. ed. Perth, WA: IEEE, Institute of Electrical and Electronics Engineers, 1999. p. 556-559.

Research output: Chapter in Book/Conference paper › Conference paper › peer-review

TY - GEN

T1 - A Design for FPGA Implementation of the Probabilistic Neural Network

AU - Minchin, G.

AU - Zaknich, Anthony

PY - 1999

Y1 - 1999

M3 - Conference paper

SN - 0780358716

VL - 2

SP - 556

EP - 559

BT - ICONIP'99 6th International Conference on Neural Information Processing Proceedings

A2 - Gedeon, T.

A2 - Wong, P.

A2 - Halgamuge, S.

A2 - Kasabov, N.

A2 - Nauck, D.

A2 - Fukushima, K.

PB - IEEE, Institute of Electrical and Electronics Engineers

CY - Perth, WA

T2 - A Design for FPGA Implementation of the Probabilistic Neural Network

Y2 - 1 January 1999

ER -