In this letter, a compact reconfigurable counter memory (RCM) is proposed for spiking pixels. In contrast to conventional in-pixel counter circuitry, the proposed RCM does not rely on a flip-flop-based circuit but instead uses a very novel circuit structure that combines a combinational incrementer together with static and dynamic memory cells. The proposed RCM provides counting as well as in-pixel storage functionalities allowing for intermediate readout of digital pixel values. Reported experimental results validate the novel concept of RCM-based spiking pixel in AMIS 0.35-mu m CMOS technology. The propose pixel architecture is inherently insensitive to power supply voltage scaling and is thus well suited to submicrometer CMOS processes.